Atomic operations on ARM

Macros
#define	__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4   1

Functions
uint32_t	__sync_fetch_and_add_4 (uint32_t volatile *object, uint32_t p00_val)
uint32_t	__sync_fetch_and_and_4 (uint32_t volatile *object, uint32_t p00_val)
uint32_t	__sync_fetch_and_or_4 (uint32_t volatile *object, uint32_t p00_val)
uint32_t	__sync_fetch_and_sub_4 (uint32_t volatile *object, uint32_t p00_val)
uint32_t	__sync_fetch_and_xor_4 (uint32_t volatile *object, uint32_t p00_val)
uint32_t	__sync_val_compare_and_swap_4 (uint32_t volatile *object, uint32_t p00_pre, uint32_t p00_des)

Detailed Description

This implementation uses the ldrex/strex instruction pair that has been implemented since arm v6.

ldrex/strex is a load-link and store instruction pair. This means a strex will only succeed if nobody else has touched "object" since the load.

This operation is not lock-free by itself, so it doesn't guarantee the requirements of the standard for operations on ::atomic_flag when used on its own. The OS must support this operation by canceling all pending ldrex operations when (de)scheduling a thread or entering or leaving a signal handler.

Remarks

This is only used if the gcc extensions for atomic lock free operations is not implemented directly by the compiler.

Uses the asm extension of gcc for inline assembler.